Wafer-Sort Test System for Flash Memory Doubles

Featured at Semicon West

Hewlett-Packard Company announces that semiconductor manufacturers now can order a FLASH-memory test system that will independently test up to 16 high-density, NVM (non-volatile memory) FLASH devices with as many as 64 signal pins or 32 lower-density NOR and NAND FLASH devices. The new HP V1300 system asynchronously checks twice as many devices under test (DUT), in parallel, than any other test system for wafer-sort applications. The HP V1300 will be demonstrated at HP's booth, No. 10516, at Semicon West.

The HP V1300 is a full-feature, memory-test system with per-pin timing resources for 16 (or 32) DUTs, APG (algorithmic pattern generator)-controlled parametric testing, redundancy analysis, and bit-mapping capabilities. It features twice the throughput of HP's current Versatest system, but it does not require any additional floor space.

The HP V1300 is the fifth-generation HP system to use Tester-Per-Site architecture, which has been featured in 10 new HP products since 1989. The compatibility of architecture and software enables users of nearly 1,000 Versatest systems worldwide to better leverage their investments in training and test programs. Several HP V1300 systems already are being used for high-volume production sorting of NVM/FLASH memory devices.

Hewlett-Packard, Contact: Bob Durstenfeld, 408-553-6820; Fax: 408-241-0918 or John E. Lucas, 408-553-7089; Fax: 408-553-6248