Virage Logic Named As TSMC's 45-Nanometer Process Early Development IP Partner
Fremont, CA and Hsinchu, Taiwan - Virage Logic Corp., one of the semiconductor industry's trusted IP partner in Silicon Aware IP and TSMC , the semiconductor foundry, recently announced that TSMC has decided to work with Virage Logic as an early development IP partner at its 45-nanometer (nm) process technology node. Building on the companies' relationship that spans the 250nm to 65nm nodes, this agreement involves the development and silicon validation of Virage Logic's Area, Speed and Power (ASAP) Memory Self-Test and Repair (STAR) Memory and ASAP Logic product families for TSMC's 45nm General Purpose and Low Power process technologies. The agreement also expands the companies' 65nm agreement (announced in May 2005) to include all 65nm process variants.
To address the complexities associated with advanced process nodes, foundries and IP providers are working more closely together. This collaboration reduces design time and time to volume.
"TSMC recognizes the value of Virage Logic's production proven embedded memory and standard cell IP provides to designers," said Kuo Wu, deputy director of design services marketing at TSMC. "We are working with early development partners at 45nm to enable customers with early access to silicon proven IP at this advanced process node."
The TSMC and Virage Logic collaboration demonstrates how the foundry and IP company relationship can provide silicon proven IP on advanced process technologies to help customers in such market segments as consumer, communications, graphics, computers, and wireless handheld devices reach their design goals more quickly.
"TSMC's collaboration with Virage Logic as an early development partner at 45nm is a significant milestone," said Dan McCranie, president and chief executive officer of Virage Logic. "With this agreement, we look forward to continuing to provide our mutual customers with silicon proven IP at the advanced process nodes of 65- and 45-nanometer."
About Virage Logic's ASAP Memory, STAR Memory and ASAP Logic Product Lines
Today's System-on-Chip (SoC) designs vary widely with respect to their density, speed and power requirements. Virage Logic's ASAP and STAR memory product lines – comprising three separate families – address these demanding requirements by providing one of the largest selections of silicon proven, high quality, easy to integrate, embedded memory IP. The High-Density (HD) memories address the needs of many applications that are optimized for area: the High-Speed (HS) memories address the requirements of high-performance systems and the Ultra-Low Power (ULP) memories address the needs of power-sensitive portable applications. All ASAP and STAR memories are seamlessly integrated with the comprehensive Built-In-Self-Test (BIST) implementation found in Virage Logic's Self-Test and Repair (STAR) Memory System. The ASAP and STAR memory product lines offer hundreds of memory compilers ranging from 250nm to 45nm process technologies available on numerous foundries.
The Virage Logic ASAP Logic product line contains application-optimized libraries targeted to unique market requirements and is based on Virage Logic's proprietary and patented routing methodology and cell architecture. ASAP Logic Metal Programmable Cell Libraries are used in SoC designs to economically enable functional reprogrammability by changing only a few metal and via masks, and are often used as a design fabric for structured ASICs. ASAP Logic Standard Cell Libraries are optimized for area, speed, and power and provide up to a 30 percent increase in utilization when compared to conventional standard cell libraries.
Availability
First availability of Virage Logic's ASAP and STAR memories and ASAP Logic products on TSMC's 45nm General Purpose process is expected to begin in Q2 2007 and first availability of Virage Logic's ASAP and STAR Memory and ASAP Logic products on TSMC's 45nm Low Power process is expected to begin in Q4 2007. For further information, please contact Virage Logic at info@viragelogic.com.
SOURCE: Virage Logic