Product/Service

The Aspen Strip

Source: Mattson Technology, Inc.
The move to smaller geometries requires that photoresist stripping achieve complete residue removal with no damage to thin gate oxides
The move to smaller geometries requires that photoresist stripping achieve complete residue removal with no damage to thin gate oxides. This has become a key process issue in photoresist strip, which is used in as many as 25 steps during IC production. Mattson's strip technology provides lower contamination and higher wafer throughput than conventional photoresist strip processing. Complete residue removal is accomplished in one chamber in situ, eliminating the need for organic solvents, thereby reducing process costs and alleviating environmental concerns. In just a few short years, Aspen Strip has become the number one strip choice in Taiwan and is aggressively challenging the number one position worldwide.

The Aspen II Strip uses the standard Aspen II platform together with one or two processing chambers. Each chamber processes two wafers at a time, with throughput ranging from 90 to 130 wafers per hour with one chamber and 110 to 160 wafers per hour with two chambers for most applications. The system's residue removal capability reduces the need for wet chemical steps and decreases the number of wet stations, thereby further reducing cost of ownership.

The Aspen III Strip is based on the standard Aspen III platform together with one, two or three processing chambers. Each chamber processes two wafers at a time, with throughput greater than or equal to 200 wafers per hour with three chambers for most applications. The innovative system design exceeds the current throughput, cost of ownership and footprint requirements set by industry consortia for 300 millimeter strip equipment.

Mattson markets the Aspen II and Aspen III Strip systems with a choice of two proprietary inductively coupled plasma, or ICP, source technologies to remove photoresist and residue from the wafer. ICP was introduced in 1997 to further extend the capability for removal of the most difficult residues formed during semiconductor processing. The ICP source's thorough residue removal capability reduces the need for wet chemical steps. The ICP source was specifically designed for advanced semiconductor device manufacturing processes of 0.18 micron and below.

Mattson also offers a strip solution for low k cleaning that is currently being used in production. The new strip capability provides advanced processing recipes that enable interconnect technology for 0.18 micron and smaller geometries using a wide range of hydrogen and fluorine chemistries. This feature enables manufacturers to clean vias or trenches with exposed low k materials while maintaining low k film integrity. In addition, it enables effective cleaning of copper films. The hydrogen compatibility feature can be ordered as an option with ICP and/or ICPSM chambers.

Mattson Technology, Inc., 3550 W. Warren Avenue, Fremont, CA 94538. Tel: 510-492-5923; Fax: 510-657-0165.