Product/Service

SiVL™ - Silicon vs. Layout verification system

Source: Numerical Technologies Inc.
SiVL (Silicon vs. Layout) is an IC design-to-silicon tool that verifies the layout of a subwavelength IC against the silicon it is intended to produce
Features:
  • Avoids costly silicon-level failures
  • Helps determine if OPC is needed
  • Improves manufacturing yield while minimizing mask cost and turnaround time
  • Eliminates iterations between design and manufacturing by detecting problems before committing to silicon
SiVL (Silicon vs. Layout) is an IC design-to-silicon tool that verifies the layout of a subwavelength IC against the silicon it is intended to produce. SiVL reads in the layout and simulates lithographic process effects, including optical, resist and etch effects. SiVL then compares the results - the simulated.

Numerical Technologies Inc., 70 W. Plumeria Drive, San Jose, CA 95134. Tel: 408-919-1910; Fax: 408-919-1920.