Product/Service

Turbo Package Analyzer™ Software - Complete package extraction

Source: Ansoft LLC
Turbo Package Analyzer™ (TPA) provides the package extraction and automation capability needed to address the electrical requirements of today's complex high-performance SiP, chip-scale, flip-chip, ball-grid array, and wire-bond

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Datasheet: Turbo Package Analyzer™
Brochure: Turbo Package Analyzer™

Turbo Package Analyzer™ (TPA) provides the package extraction and automation capability needed to address the electrical requirements of today's complex high-performance SiP, chip-scale, flip-chip, ball-grid array, and wire-bond. With TPA, IC and package designers of analog/RF and high-speed digital applications are able to fully characterize an entire package structure and automatically extract lumped or distributed RLC values for use with Nexxim® or alternative SPICE-compatible tools to perform subsequent transient analyses, such as crosstalk, overshoot, and TDR. TPA further enables the prediction of IC package performance and compatibility, facilitating performance trade-off analysis before a design is committed to fabrication. TPA couples with leading electronic package layout tools to accurately model package interconnect elements, such as non-orthogonal traces, vias, wire-bonds, and solder balls, and to take into account the non-ideal ground planes prevalent in these advanced IC package designs.

New in TPA v5.0

  • DC resistance computation for 3D structures
    • Automated net-by-net full-package DC resistance extraction using a volumetric (tetrahedral) mesh
  • Ability to designate source and sink terminal assignment on any given net
  • New 2D layout editor and 3D viewer
    • Create advanced wire-bond or flip-chip designs from scratch or modify/correct designs imported from third-party layout tools
    • System-in-Package (SiP) design with multiple wire-bond configurations including Trace-to-trace, Die-to-die, and Cascaded
    • User-defined wire-bond profiles expanding shapes from JEDEC 4- and 5-point to include arbitrary polylines
    • Complex solderball models capture true shape and subsequent electrical performance of solderballs and flip-chip solder-bumps
    • New layer stack-up editor
    • New via pad stack editor
  • VB scripting support
  • Validation check to verify setup, including detection of self-intersecting polygons; disjoint nets; overlapping (DC-shorted) nets, vias and bond wires; illegal connections between bonding pads and bond wires
  • Available for Microsoft Windows® XP Professional x64

Click Here To Download:
Datasheet: Turbo Package Analyzer™
Brochure: Turbo Package Analyzer™