Product/Service

Pulsed-plasma Doping System

Source: Varian Semiconductor Equipment
VIISta 10 P2LAD is a pulsed-plasma doping system with an approach to plasma doping that overcomes the technical challenges posed by the requirements of low energy doping for ultra shallow junctions
Varian Semiconductor Equipment2LAD is a pulsed-plasma doping system with an approach to plasma doping that overcomes the technical challenges posed by the requirements of low energy doping for ultra shallow junctions.

The VSEA approach integrates the three processes that are unleashed within the plasma doping process: conventional particle acceleration, chemisorption and recoil implantation. Dopant profiles are provided that more closely match the box style profiles needed to reach the junction requirements of the future. At the materials level, minimal crystallographic damage is generated through this approach that enables reduced thermal budgets and higher degrees of control in activation and anneal. Utilizing the conformal character of plasma doping offers potential doping solutions to processes where conventional implantation cannot be applied, such as doping of three-dimensional structures.

VSEA provides solution to the technological challenges of plasma doping by using the accelerating voltage pulse to also create the plasma. The instantaneously-formed plasma becomes a `quantized' package of dose that harnesses up to 400mA of available beam current and delivers it to the silicon substrate. These pulses need to occur for as little as 1% of the available time to reach the doping concentrations associated with source/drain extensions and contact regions of advanced devices.

Short pulse lengths and plasma life times combine to minimize both particle nucleation and the risk of etching of pre-existing surface films. These pulsing conditions also result in a process that is largely at ambient temperature to ensure photo-resist integrity. Similarly, the long relaxation times after each pulse allows stored charges to effectively drain away for effective wafer charging control and a reduced risk of dielectric damage.

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