Polysilicon CMP Process

Applied Materials, Inc.olysilicon CMP process is designed to enable high-performance sub-0.18 micron capacitor and transistor device designs. This CMP process provides the industry with a precise technology for forming polysilicon capacitor, gate and contact device structures.

This process can be used in up to four layers of some advanced DRAM devices. Applications for polysilicon CMP technology are expected to increase because they enable the formation of scaled-down capacitor and transistor gate structures as well as polysilicon contact plugs.

This polysilicon CMP is a two-slurry, multi-step process that provides customers with repeatable removal uniformity across the wafer, low defect counts for high device yield and minimal dopant loss to ensure device performance and high yield.

The flexible three platen design is suitable for addressing key issues of removal non-uniformity, defects and dopant loss.

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