NXP Semiconductors And IPextreme Launch Methodology For Semiconductor IP Design
CoReUse represents more than ten years of investment by NXP to develop a comprehensive, practical, and efficient system that can be deployed at the group and enterprise level for engineers to develop reusable, high quality IP. It is in use today by nearly every NXP design group worldwide as the standard by which IP is developed and shared across the company.
CoReUse consists of a series of specifications, guidelines, and templates that guide engineers in developing reusable digital, analog mixed signal (AMS), and RF IP and includes the following:
- CoReUse Foundation. A set of reference manuals that include the CoReUse Standard and Constraints which define directory structures, naming conventions, and quick reference cards for Verilog and VHDL designs.
- Design for test (DfT) specifications for CTAG/IEEE 1500, and support for testing AMS and high-speed IO technologies.
- An additional set of specifications targeted for AMS and RF IP.
- System level specifications for transaction level modeling, SoC integration using SPIRIT IP-XACT, and PSL assertions.
- Architectural level specifications for using on-chip busses allowing the creation of IP-based platforms.
- Documentation templates for engineers to capture key information about the IP they are developing.
An important companion to the CoReUse standard is QCore, an EDA tool internally developed by NXP to automatically check an IP's deliverables and documentation for compliance to the standard. QCore produces a certificate that classifies IP according to its compliance level to the CoReUse standard allowing integrators to know the level of completeness and quality achieved by that IP.
NXP has long been a thought leader in driving higher productivity in the semiconductor industry by pioneering advances in IP-based design and is an active participant in industry-wide IP standardization initiatives. Ralph von Vignau, senior director in NXP's Corporate Innovation and Technology group and President of the SPIRIT Consortium, commented, "NXP sees how opening up CoReUse for broad adoption can lead to faster progress on standardizations needed in the IP industry, allowing companies to more efficiently develop and share IP internally and between companies." (For a complete overview of CoReUse, see the video Q&A with Ralph von Vignau at www.ip-extreme.com)
Industry initiatives like VSIA have highlighted the difficulty the industry has experienced in creating, executing, and maintaining a standard IP reuse methodology. "CoReUse represents a giant step forward in what's available for a company to develop high quality reusable IP," said Warren Savage, president and CEO of IPextreme. "CoReUse and QCore provide something for everyone. For engineers it's a means to do your job better; for managers, it's a tool for getting the maximum output and quality out of your teams; and for executives, it's a technology that enables engineers and managers to make your organization as efficient and profitable as possible. By making the CoReUse methodology widely accessible, we are giving the design community a proven and valuable methodology and tool set that they can unwrap and use productively straight out of the box."
"NXP has made an astute analysis of IP trends," said Richard Wawrzyniak, senior market analyst, ASIC & SoC, Semico Research Corp. "IP reuse is going to continue to increase. It's just a matter of time before everyone in the design flow has to pay more attention to reuse, and an established design reuse methodology should help the whole industry."
SOURCE: IPextreme, Inc. and NXP Semiconductors