MoSys And Open-Silicon Put Tharas Systems Design Into Production

Sunnyvale, CA -- MoSys, Inc. and Open-Silicon, Inc. announced the silicon validation of MoSys' 1T-SRAM high-density, high-performance embedded memory technology within Tharas Systems' Hammer S-Class and M-Class family of verification appliances. The custom multi-core device is now in volume production on TSMC's 0.13-micron silicon process using 1T-SRAM technology for its embedded memory.

"To satisfy market needs we required high integration of simultaneously switching memory," says Subbu Ganesan, director, co-founder and CTO of Tharas Systems. "The trade-off analysis and high integration from Open-Silicon's IP team combined with the strong engineering support that MoSys provided allowed us to maximize the price/performance of our hardware-assisted verification solutions and delivered first-time working silicon on schedule."

"Complex designs like Tharas Systems' multi-core custom processor are becoming more common, and our customers are requiring higher densities of embedded memory" expressed Rajesh Shah, director of engineering and IP at Open-Silicon. "MoSys 1T-SRAM highly reliable embedded memory products are a valuable component in Open-Silicon's portfolio of silicon proven IP."

"Tharas Systems is a leader in plug-and-play simulation acceleration solutions and we are thrilled that they have effectively moved into production with our embedded memory technology," mentioned Chet Silvestri, CEO of MoSys. "The success of this joint program with Open-Silicon demonstrates how teamwork plays an important role our company's long term winning relationship."

SOURCE: Mosys, Inc.