Memory Test System

Teradyne Inc.robe-One Memory Test System features an architecture designed for the emerging requirements of high-parallel test and repair of DRAM wafers. The system's Flex-Die architecture delivers the maximum parallelism per wafer, while providing the ultimate in scalable performance. The system can be configured in speeds of 62, 125, or 250 MHz, with Dual 3D Catch RAM ranging in size from 6 up to 384 Gigabits, and with 64 to 512 SiARA-II redundancy processors. The system also features a probe card interface that guarantees accurate contact while allowing the use of lower cost probe cards.

The world of probe test makes different demands on a test system. The number of pads per die varies, with the trend moving toward fewer pads. Parallelism is a function of the tester and probe cards. Speeds are set by the test strategy of the manufacturer. Yields are nearly zero; consequently, repair is required and data collection while testing is essential.

The system is field upgradeable from a speed of 62 MHz, to 125 or 250 MHz at full parallelism without compromising Catch RAM capture speeds.

The system's Dual 3D Catch RAM, which is based on commodity DRAM, features two parallel Catch RAMs that are field upgradeable for speed, parallelism, and bit counts as memory device sizes continue to grow. The system can be configured with up to 512, 90-MIPS SiARA-II redundancy analyzers to ensure that redundancy has zero impact on test times.

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