News | April 24, 1998

Flat Panel Display Industry Tackles Yield Problems

Flat panel display (FPD) fabrication resembles IC fabrication in many ways. Both use similar techniques, both incur huge capital equipment costs, and both rely on continuous productivity improvements in order to achieve acceptable returns. Yield improvement is critical in both industries.

The IC industry's yield challenges are primarily due to shrinking feature sizes. Smaller features are more difficult to print, and more susceptible to damage from stray particles. On the other hand, a single wafer may have several hundred die. A few can be lost without serious consequences, and the cost of any single defect is relatively small.

Flat panel displays generally have much larger feature sizes than ICs yet in some ways FPD yield challenges are more severe. For example, the total area of an individual display is much larger. Only 4-8 laptop-size displays will fit on a single piece of motherglass, and each display could measure 12.1" diagonal or larger. In thin film transistor liquid crystal displays (TFT-LCDs), each color pixel contains three subpixels, each with its own transistor. A VGA resolution display (640x480 pixels) has hundreds of thousands of transistors. Failure of any one of these will create an optical defect and could ruin the entire panel. Sachio Sonobe and Keiichi Murayama of Advance Display Inc. (ADI) and Takashi Takahama of Mitsubishi Electric examined FPD yield in the recently translated January issue of the Japanese journal LCD Intelligence. Many unique yield problems arise from the size and optical requirements of the display, they said. For example, backside scratches and contamination can degrade optical performance even if electrical functioning is undamaged. The large display area requires multiple lithography exposure fields, creating the potential for "stitching" defects due to misalignment at the edges of the mask. Multiple mask layers and dimensional changes in the glass further complicate alignment. Many additional problems arise from the glass substrate, the authors claimed. Large glass plates tend to bow and warp, especially during thermal and deposition processes. Edges tend to chip and crack. Electrostatic discharge may damage devices, while static charge buildup attracts particles. Third, the metal wire formation takes place at the beginning of the FPD fabrication process. The powerful cleaning solutions used in IC manufacturing are inappropriate for metal layers.

Finally, the authors said, LCD manufacturing tools are generally less mature than semiconductor manufacturing tools.

In order to resolve these yield difficulties, the paper suggested both device and manufacturing improvements. On the device side, new structures can reduce the number of mask processes, and thus the number of stitching defects. The advantages of more stringent design rules must be weighed against the need for higher yield.

On the manufacturing side, the authors emphasized the importance of cleanliness. Organic contamination, which can cause delamination, must be reduced wherever possible, from improved cleanroom construction materials to reduced outgassing from process equipment. Human beings are the most prolific source of contamination, and automation and sealed cassettes must be used to keep them as far away from the substrates as possible.

Second, rather than merely optimizing existing tools, equipment design must incorporate new technology to minimize particles. For example, ADI achieved dramatic defect reductions by replacing a tray type SiN deposition system with a hot wall CVD reactor.

Third, prevention of static charge buildup requires continuing attention. As the insulating substrate grows, so does the risk of static buildup. As Yoshiyuki Yagi and Soichiro Sakata, of Takasago Thermal Engineering Ltd., explained elsewhere in the same journal, the biggest cause of static charge is separation charge, such as occurs when a substrate is pulled to a hot plate by vacuum and then separated by air and pins.

Static elimination by ionization is effective, but can create additional problems. The electrodes may discharge metal oxides. Unless carefully tuned to the application, the ionizer itself may deposit charges of opposite polarity to those being eliminated. Organic contamination on the substrate may encourage charge buildup.

Finally, Sonobe and coworkers emphasized the need for early detection of yield problems. As the FPD industry has matured, improved process knowledge has eliminated many destabilizing factors. Those that remain are largely due to line management and equipment control.

By Katherine Derbyshire

Acknowledgment
Interlingua, Inc. generously supplied translations from LCD Intelligence.

For more information, contact Interlingua, 423 South Pacific Coast Highway, Suite 208, Redondo Beach, CA 90277. Tel: 310-792-3636; Fax: 310-792-3642.