Product/Service

Dual Damascene Copper Interconnect Fabrication

Source: Applied Materials, Inc.
The Mirra Electra CMP system advances the industry's ability to implement dual damascene copper interconnect technology for high-speed semiconductor chips by enabling high-precision removal and planarization of copper and barrier films

The Mirra Electra CMP system advances the industry's ability to implement dual damascene copper interconnect technology for high-speed semiconductor chips by enabling high-precision removal and planarization of copper and barrier films. This system is used for planarizing devices at 0.25 micron and below geometries.

Copper CMP is the final step in the dual damascene copper process flow. After barrier, seed and copper fill layers are deposited in the interconnect structures, CMP is used to remove excess film from the wafer, leaving a smooth, flattened surface for building subsequent circuit layers.

The multi-platen design takes wafers through a sequence of different process steps that polish the wafer with different slurries at different rates as it moves between polishing platens. This design also enables a low pressure process that helps minimize dishing and erosion and provides uniformity across the wafer.

Applied Materials, Inc., 3050 Bowers Avenue, Santa Clara, CA 95054-3299. Tel: 408-727-5555. Fax: 408-748-9943.