Datacon Technology Joins EMC-3D Consortium To Develop 3-D Thru-Silicon-Via Interconnects
EMC-3D is addressing the technical, integration and economic issues of creating 3-D interconnects using TSV technology for chip stacking and advanced MEMS/sensors packaging. Through collaboration with research partners, the consortium will develop unit processes for creating micro-vias between 5 and 30 µm on 50µm thinned 200mm and 300mm wafers using via-first and die-to-wafer techniques. The primary goals of the consortium are to create a robust integrated process flow at a cost of less than $200USD per wafer.
Datacon provides die bonding and sorting equipment used in advanced assembly by the semiconductor and telecommunications industries. One of the key integration issues in 3D interconnect is the efficiency and accuracy of the die-to-wafer attach for both TSV and MEMS/sensor applications.
"One of the challenging integration issues of TSV is the die-to-wafer bonding and the cost associated with this step," said Markus Wimplinger, EMC3D board member and director of business unit technology development at EV Group. "Datacon will bring a significant expertise needed to achieve the aggressive goals of the EMC3D consortium."
SOURCE: EMC3D