News | July 26, 2005

Cadence Helps Sequans Achieve Early Time To Market For SoC

San Jose, CA -- Cadence Design Systems, Inc. announced its Engineering Services team helped Sequans Communications, a startup fabless semiconductor company, meet a challenging time-to-market goal for a high-performance system on chip (SoC). The wireless broadband chip was successfully taped out within a year of the company's initial funding.

Sequans Communications utilized tools, design expertise and intellectual property from Cadence to mitigate design risks and ensure high quality of silicon (QoS), a new metric for synthesis results that includes performance, area and power measured with wires.

The chip was designed to comply with the IEEE 802.16-2004 standard and WiMAX system profiles for broadband wireless access. Sequans Communications benefited from the comprehensive digital IC design flow based on the Cadence Encounter digital IC design platform. As part of the engagement, Cadence also supplied analog IP designed using the Virtuoso custom design platform.

With the ongoing collaboration between the companies, Sequans Communications can maximize its wireless design, software development and system capabilities, enabling it to compete aggressively in the fast-moving broadband wireless access market.

"Cadence was instrumental in this tapeout," said Georges Karam, CEO, Sequans. "The wireless design expertise of Cadence Engineering Services, coupled with world-class technology and methodologies, gave us the edge we needed to minimize our design time and deliver a successful tapeout."

"We are very pleased to have helped Sequans meet its aggressive system development and time-to-market targets," said Suresh Radia, vice president of services, Europe, Cadence Design Systems. "This engagement underscores the value Cadence Engineering Services and technology can deliver to ambitious startups like Sequans."

SOURCE: Cadence